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On 12/29/2010 1:03 PM, Javier Guerra Giraldez wrote:
On Tue, Dec 28, 2010 at 10:40 PM, KHMan wrote:On 12/29/2010 11:36 AM, Javier Guerra Giraldez wrote:sorry to disappoint, but PIC (even in the '32 family) doesn't have anything to do with the MIPS architecture. I guess the mixup is because in their literature they repeat again and again the "highest MIPS/MHz" phrase.You sure? Go look at some datasheets and come back when you've finished.right, i was wong. it turns out that PIC32 is a low-end MIPS core with a boatload of PIC-style on-chip peripherals and no PIC core anywhere. still, it doesn't have any external bus interface (no, GPIO pins doesn't count. i've done that on smaller PICs, but it makes external memory look like storage devices, not RAM); so any port would be limited to what inner memory can hold.
Patrick in the original post mentioned Logitech keyboards -- which for many of the high-end keyboards would use something like a one-chip solution like PIC32. Nobody sane will put in extra memory chips in such products, unless for a high-end low volume prestige product to make the other SKUs more palatable.
PIC32MX695F512H, for instance, has 128KB SRAM, and this is certainly within the specs of the types of ARM chips that eLua and related projects have been targeting.
So the kinds of chips mooted by Ivan is certainly relevant. The list in the past indeed talked about implementations of Lua on chips with less memory than that. Let us just call them high-end and low-end and both are quite relevant in this discussion.
OTOH, MIPS is a real 32bit ISA, targeted by real C compilers (gcc among them). In fact, even i own a MIPS-based router running a full Linux (OpenWrt), complete with a Lua interpreter, and i consider myself quite lacking gadgetwise.
Being a practical engineer, I sniff at your use of the word "real" twice in the above. Amusing. No offense. *rolls my eyes*
In any case, give the handphone wars a few years and many will adopt what is already being done in many handphones -- stack >=2 chips in one package -- most likely the processor SoC and the RAM, and leave an external interface to the Flash chips. The lines of traditional memory buses is being blurred very fast.
So, external memory buses are simply an implementation detail that depends on your particular product. In other words, when I use a one-chip solution, I don't consider myself any less macho.
This is getting to OT, so I'll try to end this here and let the thread steer itself back to eLua and related stuff.
-- Cheers, Kein-Hong Man (esq.) Kuala Lumpur, Malaysia