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Although the Lua VM instruction codes are 32-bit, they are not
word-aligned. On ARM architectures this is regrettable, because
VMs with word-aligned 32-bit instructions can be implemented
much more efficiently, with one fetch per instruction. I suspect
that amending the Lua VM to ensure that the VM instructions are
aligned to word boundaries would be a simple matter. Is there any
likelihood of such an amendment being incorporated into a future
version of Lua? It would be no skin off the noses of other CPU
architectures, and it would be nice to think of Lua being yet
more efficient on all those embedded devices that use ARM chips.

Gavin Wraith (
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