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On Fri, Aug 7, 2015 at 10:59 AM, Coda Highland <chighland@gmail.com> wrote:
> On Fri, Aug 7, 2015 at 10:56 AM, Javier Guerra Giraldez
> <javier@guerrag.com> wrote:
>> On Fri, Aug 7, 2015 at 12:48 PM, Coda Highland <chighland@gmail.com> wrote:
>>> Oh, there quite is:
>>>
>>> http://x86.renejeschke.de/html/file_module_x86_id_159.html
>>
>> ah, ok.  yes, this is avoidable in some cases, like CAS and simple
>> atomics.  still, the time penalty is the invalidation request that
>> must be propagated to interested cores. (fortunately, this is only
>> sent to those other cores that actually hold the relevant address in
>> cache)
>>
>> the numbers i've shared are totally "lock- and cas-free"  :-)
>>
>
> Unfortunately, the cores that hold the affected region in cache are
> your own other threads -- in other words, the very things you're most
> concerned about the performance of.
>
> /s/ Adam

That is to say, that's why you should minimize the number of locks you
have to use, which is exactly what batching stuff up and signaling
does, which is exactly what you're doing. This statement was meant in
support of your results, not opposition to it. :P

/s/ Adam