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On Fri, Mar 08, 2013 at 01:08:52AM -0700, Spencer Parkin wrote:
> define BUILD_OBJ_RULE =
> $(1): $(2)
>     $$(CPP) $$(FLAGS) -c $$< -o $$@
> endef
> $(foreach src, $(SRCS), $(eval $(call BUILD_OBJ_RULE, $(patsubst %.cpp,
> $(BUILD)/%.o, $(notdir $(src))), $(src))))

Nobody would write a Makefile like this one.  This one (untested) in the
spirit of Make. It reads: to build all (the default target here) one
needs all the .o files corresponding to the .cpp files listed in the
SRCS valiable; to build a .o from a .cpp call $(CPP) ...

  all: $(SRCS:%.cpp=$(BUILD)/%.o)
  $(BUILD)/%.o : %.cpp
  	$(CPP) $(FLAGS) -c $< -o $@

The GNU Make manual is a really piece of doc...

Enrico Tassi