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I am not sure how relevant this is, but RiscLua
has a facility for loading and running chunks
of machine code. Naturally the code must satisfy
some conditions (like being position independent,
preserving registers in accordance with the
ARM Procedure Call Standard, etc). A function
'link' is defined in the riscos library, so that
   riscos.link(entry, data_buffer)
calls the code at entry, with register R0 pointing
to data_buffer. Both arguments are light userdata 
pointing to arrays grabbed with malloc. There are
interface functions for writing data to such buffers
and reading data from them. So data_buffer can be
used to pass data to the ARM code at entry, and to
read back results. 
 I guess this is a crude sort of dynamic linking,
but probably not what correspondents had in mind.
There are one or two fiddly details that have to
be looked at; the StrongARM chip has Harvard
architecture, i.e. separate caches for code and
data, so these must be synchronised before the
loaded code is entered.  
-- 
Gavin Wraith (gavin@wraith.u-net.com)
Home page: http://www.wraith.u-net.com/